Sundance SMT395E User Manual

User Manual (QCF42); Version 3.0, 5/2/01; © Sundance Multiprocessor Technology Ltd. 2001 SMT395E User Manual

Version 2.1 Page 10 of 30 SMT395Q User Manual Boot Mode The SMT395E is configured to boot from flash after a reset. Flash Boot 1. The processor co

Version 2.1 Page 11 of 30 SMT395Q User Manual EMIF Control Registers The C6416 has two external memory interfaces (EMIFs). EMIF_A is 64 bits wide,

User Manual (QCF42); Version 3.0, 5/2/01; © Sundance Multiprocessor Technology Ltd. 2001 SDRAM The DSP has access to 128MBytes of SDRAM. The SDR

Version 2.1 Page 13 of 30 SMT395Q User Manual Virtex-II Pro FPGA This device, Xilinx XC2VP70, is responsible for the provision of the SHBs, RSLs,

Version 2.1 Page 14 of 30 SMT395Q User Manual FPGA resources Interrupts See SMT6400 help file.Communication ports The SMT395E provides 4 ComPorts.

Version 2.1 Page 15 of 30 SMT395Q User Manual IIOF interrupt The firmware can generate pulses on the external interrupt lines of the TIM. See SMT

Version 2.1 Page 16 of 30 SMT395Q User Manual System Control Control of the system is provided via a TI MPS430 micro-controller. This is run at 8M

Version 2.1 Page 17 of 30 SMT395Q User Manual There is an 8-wire interface between the MPS430 and the FPGA. The signal functionality is shown here;

Version 2.1 Page 18 of 30 SMT395Q User Manual These registers can be read from the BOARD_PARAMS offset in the FPGA. DSP_A 3.3V is a value that equ

Version 2.1 Page 19 of 30 SMT395Q User Manual Board Operating Parameters Various board operating parameters can be set using the following registe

Version 2.1 Page 2 of 30 SMT395Q User Manual Revision History Date Comments Engineer Version 02/11/2005 First rev, based on 395Q AL 1.0 08/0

Version 2.1 Page 20 of 30 SMT395Q User Manual The General Purpose registers are read by the MPS430. When the MPS430 reads these registers, it check

Version 2.1 Page 21 of 30 SMT395Q User Manual Series resistors are fitted inline with the output of the power supplies (DSP core and SDRAM) to be m

Version 2.1 Page 22 of 30 SMT395Q User Manual Code Composer Studio This module is fully compatible with the Code Composer Studio (CCS) debug enviro

Version 2.1 Page 23 of 30 SMT395Q User Manual Operating Conditions Safety The module presents no hazard to the user. EMC The module is designed to

Version 2.1 Page 24 of 30 SMT395Q User Manual PCB description Component Side

Version 2.1 Page 25 of 30 SMT395Q User Manual Solder Side

Version 2.1 Page 26 of 30 SMT395Q User Manual Power Connector The external power connector EXTPWR is described below: Pin_1 +5V VCC Pin_2 GND Pi

Version 2.1 Page 27 of 30 SMT395Q User Manual JP2- TTL I/O This table shows the pin-out and organisation of the TTL I/O header. Signal Pin Pin Si

Version 2.1 Page 28 of 30 SMT395Q User Manual RSL pin-out The RSL pinout (Xilinx Rocket IO) can be found in this specification. The board has 4 RSL

Version 2.1 Page 29 of 30 SMT395Q User Manual Virtex Memory Map The memory mapping is as follows: #define CP0 (volatile unsigned int *)0xB0

Version 2.1 Page 3 of 30 SMT395Q User Manual Table of Contents Revision History ...

Version 2.1 Page 30 of 30 SMT395Q User Manual FPGA Pin-Out Available in Xilinx UCF file or, see board schematics. Bibliography 1. Peripherals Re

Version 2.1 Page 4 of 30 SMT395Q User Manual System Control...

Version 2.1 Page 5 of 30 SMT395Q User Manual Notational Conventions C60 The terms C60, C64xx and TMS320C64xx will be used interchangeably througho

Version 2.1 Page 6 of 30 SMT395Q User Manual Outline Description The SMT395E is Sundance’s 4th generation of Texas Instruments ‘C6x DSP TIM (Texas

Version 2.1 Page 7 of 30 SMT395Q User Manual Block Diagram 120 I/O Pins; 16-bit Data2x Comm-Ports24 I/O pinsTimer &Control2x Comm-Ports24 I/

Version 2.1 Page 8 of 30 SMT395Q User Manual Architecture Description The SMT395E TIM consists of a Texas Instruments TMS320C6416T running at up t

Version 2.1 Page 9 of 30 SMT395Q User Manual TMS320C6416T The processor will run with zero wait states from internal SRAM. An on-board crystal osc